SB2 is a two-node ORBIT sandbox at WINLAB (Route 1, North Brunswick, NJ),
designed around the USRP X310 — the 10 G-attached, FPGA-equipped SDR
platform. Each node (node1-1.sb2, node1-2.sb2) has a directly-attached
X310 reachable as eth2 on the host.
SB2 is for X310 development. For a B210-USB sandbox use
SB1. For attenuator-controlled
topologies use SB4.
Both nodes are identical Q87T-class ORBIT nodes:
| Component | Value |
|---|---|
| Mainboard | ASUSTeK Q87T |
| CPU | Intel Core i7-4790 @ 3.60 GHz (4 cores / 8 threads) |
| RAM | 16 GB DDR3-1600 |
| Disk | Samsung SSD 850 (~238 GB) |
| WiFi 0 | Qualcomm Atheros AR928X (PCIe) |
| WiFi 1 | Intel Centrino Advanced-N + WiMAX 6250 |
| SDR | USRP X310 + 2× UBX-160 daughtercards (10 G ethernet via dedicated NIC) |
The two X310s are interconnected via coax with a 30 dB attenuator on the
TX/RX side of each link, designed for FDD-dependent experiments:

Configuration 1.
eth2)Each X310 connects to its node via a 10 G interface adapter installed in
Port 1 of the USRP. The X310's default management IP is 192.168.40.2
(see the
X310 user manual).
Make sure your host configures eth2 with an address in 192.168.40.0/24
to reach the SDR.
Older images may not bring eth2 up correctly because the X310 add-on NIC
changes Ethernet interface order at boot. Symptom: node not reachable over
SSH, or USRP unreachable.
Fix the image by booting the node, accessing it via the CM serial console,
and running:
if ! grep -i "blacklist mlx4_core" /etc/modprobe.d/blacklist.conf; then
echo "blacklist mlx4_core" >> /etc/modprobe.d/blacklist.conf
fi
if ! grep -i "mlx4_core" /etc/modules; then
echo "mlx4_core" >> /etc/modules
fi
depmod -a
update-initramfs -u
reboot
Power to each X310 is provided by its host node — the node's power
state determines the X310's power state. To reset an X310 attached to
node1-1:
omf-tell -a offh -t node1-1
omf-tell -a on -t node1-1
Note: an OMF reset command does not cycle the USRP because the node
is never powered off during a reset; the USRP keeps its rail. Use
offh → on for a true SDR power-cycle.